Principal Engineer, Digital Verification and Emulation

Principal Engineer, Digital Verification & Emulation Location: San Jose, CA — on-site Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics, or CPO, we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry leaders including NVIDIA, AMD, MediaTek and Intel, and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to enabling next-generation AI scale-up architectures. We are seeking a Principal Engineer, Digital Verification & Emulation to lead verification and hardware-assisted validation for our next-generation silicon photonic chip. This role will focus on digital verification, emulation bring-up, mixed-signal-aware verification, real-number modeling, and software-driven pre-silicon validation. This is a senior individual-contributor t